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aasmcpu.pas
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0e7e45d423
* avoid warnings in the avr code generator
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13 years ago |
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agavrgas.pas
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6d4a9aad66
pass new asm extra opt using -ao option
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11 years ago |
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aoptcpu.pas
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8f343078fa
* optimize moves into movw if possible
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14 years ago |
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aoptcpub.pas
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2f5ce095ce
* RefsHaveIndexReg -> cpurefshaveindexreg
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13 years ago |
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aoptcpud.pas
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bc73f9021c
Merged revisions 5891-10167,10169-10180 via svnmerge from
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17 years ago |
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avrreg.dat
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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cgcpu.pas
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9c1f917e3a
* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.
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11 years ago |
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cpubase.pas
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c48d572996
Implement support for saving and restoring address registers.
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12 years ago |
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cpuinfo.pas
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8b17a358e4
Remove all traces of the interrupt vector table generation mechanism
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13 years ago |
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cpunode.pas
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9856e548ed
* avr stuff, work in progress
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16 years ago |
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cpupara.pas
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cb48c2afca
* some fixes for parameter handling on avr
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11 years ago |
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cpupi.pas
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0e7e45d423
* avoid warnings in the avr code generator
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13 years ago |
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cputarg.pas
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0e13d07a31
+ more avr code
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17 years ago |
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hlcgcpu.pas
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ac419e1cb4
+ passthrough hlcgpu for AVR
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13 years ago |
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itcpugas.pas
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8d960cb608
+ implementation of shifting operations for avr
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14 years ago |
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navradd.pas
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ecd0749d73
* class name in comment fixed
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13 years ago |
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navrcnv.pas
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f419966f06
+ generic second_int_to_bool, depends on OP_OR setting flags
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14 years ago |
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navrmat.pas
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d2aa35e9de
* throw an internal error if code generation depends on expectloc but expectloc and real loc do not match
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13 years ago |
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raavr.pas
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0e13d07a31
+ more avr code
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17 years ago |
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raavrgas.pas
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0fc422f244
* moved definition of maxcpuregister and tcpuregisterset from cgbase to
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13 years ago |
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ravrcon.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrdwa.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrnor.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrnum.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrrni.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrsri.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrsta.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrstd.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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ravrsup.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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13 years ago |
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rgcpu.pas
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53ee505d84
* fixed spilling
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14 years ago |
sergei
9c1f917e3a
* a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around.