| .. |
|
aasmcpu.pas
|
43538416e3
Handle ADR LDM and STM arm instructions
|
5 mesi fa |
|
agarmgas.pas
|
9feafc7bd7
+ ARM: started on vfpv5 support
|
3 anni fa |
|
agarmvasm.pas
|
e9b3db0d78
* more fixes to support vasm on arm
|
4 anni fa |
|
aoptcpu.pas
|
c7290bfb78
* enclose {$define DEBUG_AOPTCPU} in {$ifdef EXTDEBUG}
|
6 mesi fa |
|
aoptcpub.pas
|
29916bc6f6
* arm: Fixed "RegInInstruction" and "RegModifiedByInstruction" not handling the flags properly
|
1 anno fa |
|
aoptcpud.pas
|
790a4fe2d3
* log and id tags removed
|
20 anni fa |
|
armatt.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
6 anni fa |
|
armatts.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
6 anni fa |
|
armins.dat
|
0316a7697f
* arm thumb1: several fixes for the internal assembler writer
|
4 anni fa |
|
armnop.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
6 anni fa |
|
armop.inc
|
867df5362c
+ basic Neon support in the assembler writer
|
6 anni fa |
|
armreg.dat
|
2a93e65511
* seperator => separator
|
3 anni fa |
|
armtab.inc
|
0316a7697f
* arm thumb1: several fixes for the internal assembler writer
|
4 anni fa |
|
cgcpu.pas
|
490c431bf9
* make use of not_zero in tbasecgarm.a_bit_scan_reg_reg
|
6 mesi fa |
|
cpubase.pas
|
d03c3c0669
Disable overflow/range check in some part of the arm code
|
4 anni fa |
|
cpuelf.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
4 anni fa |
|
cpuinfo.pas
|
2a50d5abf8
* ARMv7A / A64: Constant writes to memory merged to larger forms where possible
|
10 mesi fa |
|
cpunode.pas
|
bf970b29f4
* arm / a64: TAsmNode debugging info is now output for ARM and AArch64
|
1 anno fa |
|
cpupara.pas
|
03a961709b
arm paramanager: always create at least one paraloc
|
3 anni fa |
|
cpupi.pas
|
e7d1a77f9a
* rename the ARM/AArch64-Darwin targets to ARM/AArch64-iOS
|
5 anni fa |
|
cputarg.pas
|
4ab310e0ed
+ ARM: basic vasm support
|
4 anni fa |
|
hlcgcpu.pas
|
d1f035f456
* arm: Labels to constants are now data labels and not jump labels
|
3 anni fa |
|
itcpugas.pas
|
47d43750e4
* remove unused units from uses statements
|
12 anni fa |
|
narmadd.pas
|
8146443336
+ set pi_do_call on ARM as well if we check for fpu exceptions
|
1 anno fa |
|
narmcal.pas
|
7c2c8581b7
* get rid of fpu_vfp_first/last hack
|
5 anni fa |
|
narmcnv.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
4 anni fa |
|
narmcon.pas
|
f7bfa0e426
* range checking is already performed in pass_typecheck
|
1 anno fa |
|
narminl.pas
|
c87213085f
* overflow checking for generic abs(<int64>)
|
1 anno fa |
|
narmld.pas
|
637976e83f
* patch by Marģers to unify internal error numbers, resolves #37888
|
4 anni fa |
|
narmmat.pas
|
8535c758ef
+ initial support for ARMv2
|
4 anni fa |
|
narmmem.pas
|
d6de2c03cb
* generic part of r26050 from the hlcgllvm branch: made tcgvecnode hlcg-safe
|
10 anni fa |
|
narmset.pas
|
cba0ca490e
* genlinearlist and genlinearcmplist for case blocks now allocate the flags properly
|
4 mesi fa |
|
narmutil.pas
|
a16f2ae35d
* tai_eabi_attribute -> tai_attribute so it can be used by other architectures
|
8 mesi fa |
|
pp.lpi.template
|
1f032375c3
* improved template with help from Mattias Gaertner
|
19 anni fa |
|
raarm.pas
|
0316a7697f
* arm thumb1: several fixes for the internal assembler writer
|
4 anni fa |
|
raarmgas.pas
|
f1d30a5bc6
Add .force_thumb pseudo-directive support forarm reader
|
4 anni fa |
|
rarmcon.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmdwa.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmnor.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmnum.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmrni.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmsri.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmsta.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmstd.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rarmsup.inc
|
387824c1ee
Added some APSR register bitmask definitions.
|
10 anni fa |
|
rgcpu.pas
|
c2faf6a8fd
Avoid invalid typecast if hp is not an instruction
|
4 anni fa |
|
symcpu.pas
|
7f3a5eb9ab
* extend tabstractprocdef.getcopyas by a parameter to control whether the copy should be registered or not
|
3 anni fa |
|
tripletcpu.pas
|
2ed4071c1e
ARM: fixed compiler compilation after 75c16b612660
|
3 anni fa |
J. Gareth "Curious Kit" Moreton
cba0ca490e
* genlinearlist and genlinearcmplist for case blocks now allocate the flags properly