sergei b70c5efa65 * SPARC peephole: check that result of GetNextInstructionUsingReg is actually an instruction, because GetNextInstruction can stop at a label. Resolves #26798. 11 jaren geleden
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aasmcpu.pas 20dbda751a * fixed sparc compilation after addr_lo/hi changes 18 jaren geleden
aoptcpu.pas b70c5efa65 * SPARC peephole: check that result of GetNextInstructionUsingReg is actually an instruction, because GetNextInstruction can stop at a label. Resolves #26798. 11 jaren geleden
aoptcpub.pas 2f5ce095ce * RefsHaveIndexReg -> cpurefshaveindexreg 13 jaren geleden
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 jaren geleden
cgcpu.pas e4fea2ebc8 * Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning. 11 jaren geleden
cpubase.pas f3801d13de * SPARC: cleaned up and actualized TAsmCond (stuff copy-pasted from x86 removed, conditions for unordered floating-point comparisons added). Fixes Mantis #9362 on this target. 11 jaren geleden
cpuelf.pas 0aa7204707 + Added codes of dynamic relocations to TElfTarget; since most targets use similar dynamic relocation model differing only in code values, this will allow to do majority of handling in the base class. 12 jaren geleden
cpugas.pas 5e6669890a Handle asmextraopt in powerpc, mips and sparc assemblers 11 jaren geleden
cpuinfo.pas e190f76dd9 * removed spaces from sparc cpu name strings so they can be much easier used 12 jaren geleden
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: 11 jaren geleden
cpupara.pas 2c02e8a726 - i386, x86_64, SPARC: removed paramanager.getintparaloc overrides, it is handled by generic implementation since r24716. 11 jaren geleden
cpupi.pas 176d8434e4 * SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code. 11 jaren geleden
cputarg.pas 7587145320 Add possibility to test sparc elf generator with -dTEST_AGSPARC_ELF 13 jaren geleden
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, 14 jaren geleden
itcpugas.pas 790a4fe2d3 * log and id tags removed 20 jaren geleden
ncpuadd.pas 0cf7357ee2 * fix GetResFlags DFA optimizer warning on Sparc and AVR too 11 jaren geleden
ncpucall.pas 58882e2934 * SPARC: UNIMP instruction has 22-bit "opcode", not 12-bit. 11 jaren geleden
ncpucnv.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 jaren geleden
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed 11 jaren geleden
ncpumat.pas f3801d13de * SPARC: cleaned up and actualized TAsmCond (stuff copy-pasted from x86 removed, conditions for unordered floating-point comparisons added). Fixes Mantis #9362 on this target. 11 jaren geleden
ncpuset.pas e163a2c813 * MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets). 11 jaren geleden
opcode.inc 9a486d73ba + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 11 jaren geleden
racpu.pas 18eb495d0f * give a regular error message instead of an internal error on x86 17 jaren geleden
racpugas.pas eaba90dda7 * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. 11 jaren geleden
rgcpu.pas d2a9308181 + SPARC: implemented register spill replacement. 11 jaren geleden
rspcon.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rspdwrf.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rspnor.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rspnum.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rsprni.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rspsri.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rspstab.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rspstd.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
rspsup.inc c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
spreg.dat c3da1aa542 Reenabled D0-D30 registers 13 jaren geleden
strinst.inc 9a486d73ba + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. 11 jaren geleden
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 11 jaren geleden