sergei b70c5efa65 * SPARC peephole: check that result of GetNextInstructionUsingReg is actually an instruction, because GetNextInstruction can stop at a label. Resolves #26798. пре 11 година
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aasmcpu.pas 20dbda751a * fixed sparc compilation after addr_lo/hi changes пре 18 година
aoptcpu.pas b70c5efa65 * SPARC peephole: check that result of GetNextInstructionUsingReg is actually an instruction, because GetNextInstruction can stop at a label. Resolves #26798. пре 11 година
aoptcpub.pas 2f5ce095ce * RefsHaveIndexReg -> cpurefshaveindexreg пре 13 година
aoptcpud.pas 790a4fe2d3 * log and id tags removed пре 20 година
cgcpu.pas e4fea2ebc8 * Dummy implementations of a_bit_scan_reg_reg and g_stackpointer_alloc in tcg, removes the need to override these methods in every descendant code generator solely to avoid "constructing a class with abstract method" warning. пре 11 година
cpubase.pas f3801d13de * SPARC: cleaned up and actualized TAsmCond (stuff copy-pasted from x86 removed, conditions for unordered floating-point comparisons added). Fixes Mantis #9362 on this target. пре 11 година
cpuelf.pas 0aa7204707 + Added codes of dynamic relocations to TElfTarget; since most targets use similar dynamic relocation model differing only in code values, this will allow to do majority of handling in the base class. пре 12 година
cpugas.pas 5e6669890a Handle asmextraopt in powerpc, mips and sparc assemblers пре 11 година
cpuinfo.pas e190f76dd9 * removed spaces from sparc cpu name strings so they can be much easier used пре 12 година
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: пре 11 година
cpupara.pas 2c02e8a726 - i386, x86_64, SPARC: removed paramanager.getintparaloc overrides, it is handled by generic implementation since r24716. пре 11 година
cpupi.pas 176d8434e4 * SPARC: completely rewrote PIC-related code, got it twice shorter in source lines and much less instructions in generated code. пре 11 година
cputarg.pas 7587145320 Add possibility to test sparc elf generator with -dTEST_AGSPARC_ELF пре 13 година
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, пре 14 година
itcpugas.pas 790a4fe2d3 * log and id tags removed пре 20 година
ncpuadd.pas 0cf7357ee2 * fix GetResFlags DFA optimizer warning on Sparc and AVR too пре 11 година
ncpucall.pas 58882e2934 * SPARC: UNIMP instruction has 22-bit "opcode", not 12-bit. пре 11 година
ncpucnv.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed пре 11 година
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed пре 11 година
ncpumat.pas f3801d13de * SPARC: cleaned up and actualized TAsmCond (stuff copy-pasted from x86 removed, conditions for unordered floating-point comparisons added). Fixes Mantis #9362 on this target. пре 11 година
ncpuset.pas e163a2c813 * MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets). пре 11 година
opcode.inc 9a486d73ba + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. пре 11 година
racpu.pas 18eb495d0f * give a regular error message instead of an internal error on x86 пре 17 година
racpugas.pas eaba90dda7 * SPARC: since peephole optimizer recognizes only one conditional branching instruction, generate all branches using A_Bxx opcode, and change it to A_FBxx if necessary when writing assembler. This enables optimization of floating-point branches. пре 11 година
rgcpu.pas d2a9308181 + SPARC: implemented register spill replacement. пре 11 година
rspcon.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rspdwrf.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rspnor.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rspnum.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rsprni.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rspsri.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rspstab.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rspstd.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
rspsup.inc c3da1aa542 Reenabled D0-D30 registers пре 13 година
spreg.dat c3da1aa542 Reenabled D0-D30 registers пре 13 година
strinst.inc 9a486d73ba + SPARC: support FNEGd/FNEGq internal instructions, and use them to implement floating-point negation more efficiently. пре 11 година
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". пре 11 година