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aasmcpu.pas
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2227045e23
Replace forbidden chars in more places in the GAS assembler writer.
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il y a 11 ans |
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agavrgas.pas
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6d4a9aad66
pass new asm extra opt using -ao option
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il y a 11 ans |
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aoptcpu.pas
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2227045e23
Replace forbidden chars in more places in the GAS assembler writer.
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il y a 11 ans |
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aoptcpub.pas
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e33550b67d
Added support for X,Y,and Z register aliases plus low/high forms, and post-incrementation in AVR assembler reader.
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il y a 11 ans |
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aoptcpud.pas
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bc73f9021c
Merged revisions 5891-10167,10169-10180 via svnmerge from
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il y a 17 ans |
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avrreg.dat
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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cgcpu.pas
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10522e9779
Disabled a_adjust_sp optimized steps for now.
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il y a 11 ans |
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cpubase.pas
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e33550b67d
Added support for X,Y,and Z register aliases plus low/high forms, and post-incrementation in AVR assembler reader.
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il y a 11 ans |
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cpuinfo.pas
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b2b26f84cf
* partially merged the mips-embedded branch of Michael Ring:
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il y a 11 ans |
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cpunode.pas
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b57c95043f
+ support overriding tdef/tsym methods with target-specific functionality:
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il y a 11 ans |
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cpupara.pas
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2227045e23
Replace forbidden chars in more places in the GAS assembler writer.
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il y a 11 ans |
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cpupi.pas
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eeb15fc445
* Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do).
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il y a 11 ans |
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cputarg.pas
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0e13d07a31
+ more avr code
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il y a 17 ans |
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hlcgcpu.pas
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ac419e1cb4
+ passthrough hlcgpu for AVR
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il y a 13 ans |
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itcpugas.pas
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8d960cb608
+ implementation of shifting operations for avr
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il y a 14 ans |
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navradd.pas
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ecd0749d73
* class name in comment fixed
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il y a 13 ans |
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navrcnv.pas
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f419966f06
+ generic second_int_to_bool, depends on OP_OR setting flags
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il y a 14 ans |
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navrmat.pas
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d2aa35e9de
* throw an internal error if code generation depends on expectloc but expectloc and real loc do not match
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il y a 13 ans |
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raavr.pas
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0e13d07a31
+ more avr code
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il y a 17 ans |
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raavrgas.pas
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e33550b67d
Added support for X,Y,and Z register aliases plus low/high forms, and post-incrementation in AVR assembler reader.
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il y a 11 ans |
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ravrcon.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrdwa.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrnor.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrnum.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrrni.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrsri.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrsta.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrstd.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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ravrsup.inc
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4dee21c60e
+ NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added
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il y a 13 ans |
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rgcpu.pas
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53ee505d84
* fixed spilling
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il y a 14 ans |
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symcpu.pas
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d452686c39
* moved pbestrealtype from symdef to symcpu
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il y a 11 ans |
sergei
eeb15fc445
* Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do).