sergei eeb15fc445 * Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do). %!s(int64=11) %!d(string=hai) anos
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aasmcpu.pas 2227045e23 Replace forbidden chars in more places in the GAS assembler writer. %!s(int64=11) %!d(string=hai) anos
agavrgas.pas 6d4a9aad66 pass new asm extra opt using -ao option %!s(int64=11) %!d(string=hai) anos
aoptcpu.pas 2227045e23 Replace forbidden chars in more places in the GAS assembler writer. %!s(int64=11) %!d(string=hai) anos
aoptcpub.pas e33550b67d Added support for X,Y,and Z register aliases plus low/high forms, and post-incrementation in AVR assembler reader. %!s(int64=11) %!d(string=hai) anos
aoptcpud.pas bc73f9021c Merged revisions 5891-10167,10169-10180 via svnmerge from %!s(int64=17) %!d(string=hai) anos
avrreg.dat 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
cgcpu.pas 10522e9779 Disabled a_adjust_sp optimized steps for now. %!s(int64=11) %!d(string=hai) anos
cpubase.pas e33550b67d Added support for X,Y,and Z register aliases plus low/high forms, and post-incrementation in AVR assembler reader. %!s(int64=11) %!d(string=hai) anos
cpuinfo.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: %!s(int64=11) %!d(string=hai) anos
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: %!s(int64=11) %!d(string=hai) anos
cpupara.pas 2227045e23 Replace forbidden chars in more places in the GAS assembler writer. %!s(int64=11) %!d(string=hai) anos
cpupi.pas eeb15fc445 * Added virtual method tprocinfo.postprocess_code and moved target-specific processing from base class into target-specific descendant classes (ARM and AVR, other targets still to do). %!s(int64=11) %!d(string=hai) anos
cputarg.pas 0e13d07a31 + more avr code %!s(int64=17) %!d(string=hai) anos
hlcgcpu.pas ac419e1cb4 + passthrough hlcgpu for AVR %!s(int64=13) %!d(string=hai) anos
itcpugas.pas 8d960cb608 + implementation of shifting operations for avr %!s(int64=14) %!d(string=hai) anos
navradd.pas ecd0749d73 * class name in comment fixed %!s(int64=13) %!d(string=hai) anos
navrcnv.pas f419966f06 + generic second_int_to_bool, depends on OP_OR setting flags %!s(int64=14) %!d(string=hai) anos
navrmat.pas d2aa35e9de * throw an internal error if code generation depends on expectloc but expectloc and real loc do not match %!s(int64=13) %!d(string=hai) anos
raavr.pas 0e13d07a31 + more avr code %!s(int64=17) %!d(string=hai) anos
raavrgas.pas e33550b67d Added support for X,Y,and Z register aliases plus low/high forms, and post-incrementation in AVR assembler reader. %!s(int64=11) %!d(string=hai) anos
ravrcon.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrdwa.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrnor.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrnum.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrrni.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrsri.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrsta.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrstd.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
ravrsup.inc 4dee21c60e + NR_DEFAULTFLAGS and RS_DEFAULTFLAGS for all CPUs with flags added %!s(int64=13) %!d(string=hai) anos
rgcpu.pas 53ee505d84 * fixed spilling %!s(int64=14) %!d(string=hai) anos
symcpu.pas d452686c39 * moved pbestrealtype from symdef to symcpu %!s(int64=11) %!d(string=hai) anos