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aoptcpu.pas
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2fa066b003
* optimize vmovaps/vmovapd after avx instructions
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11 жил өмнө |
aoptcpub.pas
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2f5ce095ce
* RefsHaveIndexReg -> cpurefshaveindexreg
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13 жил өмнө |
aoptcpud.pas
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790a4fe2d3
* log and id tags removed
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20 жил өмнө |
cgcpu.pas
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d8c0f11ff9
+ cs_userbp optimizer switch, so on x86-64 the compiler can make use of rbp if it is not needed as frame pointer
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11 жил өмнө |
cpubase.inc
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bfbb0c5b9d
* optimize mov/lea
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12 жил өмнө |
cpuelf.pas
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11b72b5515
x86_64 internal ELF linker:
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12 жил өмнө |
cpuinfo.pas
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d88d644925
+ support for FMA intrinsic: if there is no hardware support, the compiler throws an error.
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11 жил өмнө |
cpunode.pas
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b57c95043f
+ support overriding tdef/tsym methods with target-specific functionality:
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11 жил өмнө |
cpupara.pas
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8c693a3300
* Win64 apparently expects records with single field of floating-point type to be passed the same way as that only field, i.e. in xmm register. Fixes tests/cg/tcalext6.pp.
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11 жил өмнө |
cpupi.pas
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70dda94474
* x86_64-win64: don't allocate outgoing parameter area in nostackframe procedures, it fails compilation if range/overflow/etc checking is enabled (which always sets pi_do_call) due to check introduced in r22677.
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12 жил өмнө |
cputarg.pas
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3327d508ee
Enable nasm assembler for x86_64 cpu
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11 жил өмнө |
hlcgcpu.pas
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71deda6f50
+ added interface to ncgutil.gen_load_loc_cgpara() to hlcgobj + generic
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14 жил өмнө |
nx64add.pas
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2459518bdd
* use IMUL even for unsigned multiplication on x86_64, when overflow checking is
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11 жил өмнө |
nx64cal.pas
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b837694207
* factored out releasing an unused return value into
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14 жил өмнө |
nx64cnv.pas
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edd42aa42a
* moved subsetref/reg and bit_set/test support from cgobj to hlcgobj for
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13 жил өмнө |
nx64flw.pas
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3fb304cbe2
- Removed Win64 SEH code specific to results of managed types returned in registers. Since r26228 managed types are always returned in parameters.
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11 жил өмнө |
nx64inl.pas
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790a4fe2d3
* log and id tags removed
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20 жил өмнө |
nx64mat.pas
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b594eee70b
* Moved x86_64 mod/div code to x86, with minimal changes to ensure it compiles on i386/i8086. Merging optimized division-by-const code from i386 is pending...
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11 жил өмнө |
nx64set.pas
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859676d7d3
* fixed r26519 for darwin/x86-64, see comments (mantis #25644)
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11 жил өмнө |
r8664ari.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664att.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664con.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664dwrf.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664int.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664iri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664nasm.inc
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2ec5a649d7
* set Ch_* for more operations
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11 жил өмнө |
r8664nor.inc
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283ff05127
* merged avx support in inline assembler developed by Torsten Grundke
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13 жил өмнө |
r8664num.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664ot.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664rni.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664sri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664stab.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
r8664std.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 жил өмнө |
rax64att.pas
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0db44ae108
+ Support SEH directives in x86_64 AT&T asmreader.
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14 жил өмнө |
rax64int.pas
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f726e1691b
* Fixed warnings and notes.
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16 жил өмнө |
rgcpu.pas
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a3f58e84be
* rbp can be used for normal purpose under certain conditions so it shouldn't interfere with all other registers
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11 жил өмнө |
symcpu.pas
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94bcb9878a
* reimplemented r28329 in a different way, as suggested by Jonas
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11 жил өмнө |
win64unw.pas
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6a3fe72de9
+ Support .rva directive in AT&T reader. Put it into base class because it generally applies to all targets with COFF output, but enabled for Windows targets only (others need additional testing).
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14 жил өмнө |
x8664ats.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 жил өмнө |
x8664att.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 жил өмнө |
x8664int.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 жил өмнө |
x8664nop.inc
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842e027a9f
+ prove of concept how FMA4 could be supported in inline assembler
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11 жил өмнө |
x8664op.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 жил өмнө |
x8664pro.inc
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dc628b8969
* x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway.
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11 жил өмнө |
x8664tab.inc
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842e027a9f
+ prove of concept how FMA4 could be supported in inline assembler
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11 жил өмнө |