 florian
|
da54d0e8f7
+ patch by J. Gareth Moreton: new method TAOptObj.CanDoJumpOpts and arm specific implementation
|
5 anni fa |
|
florian
|
a2d3522812
* general-dynamic -> global-dynamic
|
5 anni fa |
|
florian
|
5d1d9858d1
+ VMovVMov2VMov optimization
|
6 anni fa |
|
florian
|
3d5ab366e1
* fix RemoveSuperfluousVMov if the VMov destination reg is an integer register, resolved #35978
|
6 anni fa |
|
florian
|
0a0397c9f5
* forgotten part of previous commit: fix BccB2Cond optimization on arm
|
6 anni fa |
|
florian
|
fd70fcace6
* fix BccB2Cond optimization on arm
|
6 anni fa |
|
florian
|
f23f3a4c5e
* enable TCpuAsmOptimizer.RemoveSuperfluousVMov for VLDR
|
6 anni fa |
 Jonas Maebe
|
281b3ad276
* fix case completeness and unreachable code warnings in compiler that would
|
6 anni fa |
 Jeppe Johansen
|
44beea91b5
- Fix UTX* optimizations that didn't consider the optional ROR parameter.
|
6 anni fa |
|
florian
|
94d7a02fae
* modified patch by Gareth Moreton to pool TmpUsedRegs in the assembler optimizers, resolves #34679
|
6 anni fa |
 yury
|
92e579a294
* Improved the comment.
|
6 anni fa |
|
yury
|
fdcb12d9f6
* ARM: Remove preindexing and postindexing for LDR in some cases when removing superfluous MOVs. It fixes crash when calling Format() if rtl is compiled with -O3.
|
6 anni fa |
|
Jonas Maebe
|
122d0d36d6
+ volatile() expression that marks an expression as volatile
|
6 anni fa |
 pierre
|
aebc8527ef
Also disable range checking in arm/aoptcpu unit
|
6 anni fa |
|
florian
|
9f16c34329
+ initial work for tls-based threadvar support on arm-linux
|
6 anni fa |
|
pierre
|
fbffd2a38f
Fix typecast in FindRegDeAlloc call
|
6 anni fa |
|
Jeppe Johansen
|
09a8cafcd7
Restricted MlaCmp>Mlas optimization to only work in ARM mode.
|
8 anni fa |
|
florian
|
4868b83157
* do not generate always debug messages in the arm assembler optimizer
|
8 anni fa |
|
yury
|
3bedccf946
* ARM scheduler need to move register de-allocs located before the instruction. Also preserve order of allocs and de-allocs.
|
8 anni fa |
|
yury
|
fe0e30030f
* In ARM scheduler move all needed additional items with an instruction:
|
8 anni fa |
|
Jonas Maebe
|
38fd0efa3b
* don't conditionalise BL on ARM, because it may have to be converted to
|
9 anni fa |
|
florian
|
73aeea73ed
+ VOpVMov2VOp optimization
|
9 anni fa |
|
florian
|
1266491085
o refactored some peephole optimizer code:
|
9 anni fa |
|
Jeppe Johansen
|
803f402bf8
Fix minor bug in peephole optimizer.
|
9 anni fa |
|
yury
|
432248cbf1
* Removed lot of unused vars.
|
10 anni fa |
|
yury
|
df9d6db398
* Fixed instruction re-scheduler for ARM in case of PIC.
|
10 anni fa |
|
Jeppe Johansen
|
9e5979e8be
Implemented UAL syntax support in the ARM assembler reader. Can be toggled with a field for now, but not implemented yet. Still using pre-UAL syntax for now.
|
10 anni fa |
|
Jeppe Johansen
|
3bc1db9612
Fixed breakage in the ARM peephole optimizer indirectly brought to light by r29189.
|
10 anni fa |
|
Jeppe Johansen
|
d04e988ff1
Make sure optimizer don't generate invalid assembler forms (LDRD and STRD).
|
10 anni fa |
|
Jeppe Johansen
|
d3e91bb60c
Fixed issue #26965. The peephole optimization didn't move a potential register deallocation to after the ldr instruction causing mov's to be removed.
|
10 anni fa |
