 Jeppe Johansen
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07b2982e77
Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference.
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11 years ago |
 masta
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3f8549365a
Don't schedule LDRD on ARM
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11 years ago |
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Jeppe Johansen
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257b1affaa
Fixed previous fix of LsrAnd2Lsr optimization.
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11 years ago |
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Jeppe Johansen
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f773334374
Fixed LsrAnd2Lsr peephole optimization for ARM.
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11 years ago |
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Jeppe Johansen
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3b4f59c316
Fixed MLA/MLS peephole optimization and moved it to the generic ARM peephole optimizer.
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11 years ago |
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Jeppe Johansen
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184baa3f99
Fixed invalid peephole optimization of ADD/SUB(SP) instructions for ARMv7*M targets.
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11 years ago |
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masta
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9e0af11ad8
Rerun the peephole optimizer after removing the current instruction.
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11 years ago |
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masta
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57ff589ec7
Always set p to the next instruction after removing p from asml.
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11 years ago |
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masta
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c644503daf
Add MovLdr2Ldr peephole optimizer for ARM
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11 years ago |
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masta
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77d12f61a2
Handle LDRD and STRD correctly in RegInInstruction for ARM
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11 years ago |
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Jeppe Johansen
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d24cbbf9f5
Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4.
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11 years ago |
 florian
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4d5119bf1c
* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables
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11 years ago |
 Jonas Maebe
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10ae87f11c
* fixed LdrLdr2LdrMov optimisation in case the first and second ldr have
|
12 years ago |
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Jonas Maebe
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31a3122b91
* fixed LsrAnd2Lsr test by replacing the existing buggy check with comparing
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12 years ago |
 sergei
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a5ae26da7e
* Moved SkipEntryExitMarker method from ARM optimizer to the base one, since it is not target-dependent. Now it can be reused by other targets.
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12 years ago |
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florian
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cb1f38b0af
* strd/ldrd are not supported by thumb
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12 years ago |
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masta
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ff95d42216
Fix ShiftShift2Shift 1 ARM-peephole optimizer
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12 years ago |
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florian
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d4968e054b
+ arm: tsettings.instructionset
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12 years ago |
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florian
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7cef301e84
* disable optimization LdrbAnd2Ldrb for arm thumb as it is currently done
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12 years ago |
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florian
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d5ddf39f73
* do not do the RedundantMovProcess optimization when the involved registers are r13 or r15 and if the target is arm thumb(2)
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12 years ago |
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florian
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8884f1c0bf
* arm thumb2 supports only left shifted index registers up to 3 bits
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12 years ago |
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Jonas Maebe
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8ffb704b8c
* don't split address labels from the instruction they belong with when
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12 years ago |
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florian
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2806947a8f
+ FindRegAllocBackward
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12 years ago |
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Jeppe Johansen
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fdcc68cfd7
Disabled preindex/postindexed peephole optimizations for Thumb and Thumb2
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12 years ago |
|
Jeppe Johansen
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f3273fa87d
Optimize Add/Sub+Ldr/Str by using preindexed references
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12 years ago |
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Jeppe Johansen
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2d823452b7
The scheduler pass of the ARM optimizer left markers in the instruction list, which could prevent further peephole optimizations
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12 years ago |
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masta
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8c32802fcf
Added LdrbAnd2Ldrb Peephole optimizer for arm
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12 years ago |
|
masta
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073cab8d86
Optimize FoldShiftLdrStr in ARM Peephole optimizer
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12 years ago |
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Jeppe Johansen
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c4263ced51
Disable one peephole optimization for Thumb
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12 years ago |
|
florian
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c0d4f189e9
* and takes three operands
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12 years ago |
