 Jonas Maebe
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e97f31541e
- reverted partial commit of merge
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%!s(int64=10) %!d(string=hai) anos |
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Jonas Maebe
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a76bbf363d
* synchronised with trunk r29513
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%!s(int64=10) %!d(string=hai) anos |
 Jeppe Johansen
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857a849173
Added an additional check to the MulAdd2MLA optimization. The operands of the multiplication weren't checked.
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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a1197460e1
Constrained a number of optimizations and updated reference offsets for ARM Thumb.
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%!s(int64=11) %!d(string=hai) anos |
 florian
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23c8517418
* applying opXYX2opsXY to ADD makes no sense on thumb-2 (at least as far as I can see)
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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95589fb1e2
Apply DataMov2Data to MLA and MLS too. Those have over 4 operands.
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%!s(int64=11) %!d(string=hai) anos |
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florian
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ac85d44899
* do OpCmp2OpS optimization also if after cmp follows an appropriate mov
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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6861cbcf16
Allow FoldShiftLdrStr for all sizes of LDR/STR, and disable it for references that post/pre increment the base register on Thumb-2 targets.
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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07b2982e77
Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference.
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%!s(int64=11) %!d(string=hai) anos |
 masta
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3f8549365a
Don't schedule LDRD on ARM
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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257b1affaa
Fixed previous fix of LsrAnd2Lsr optimization.
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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f773334374
Fixed LsrAnd2Lsr peephole optimization for ARM.
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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3b4f59c316
Fixed MLA/MLS peephole optimization and moved it to the generic ARM peephole optimizer.
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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184baa3f99
Fixed invalid peephole optimization of ADD/SUB(SP) instructions for ARMv7*M targets.
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%!s(int64=11) %!d(string=hai) anos |
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masta
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9e0af11ad8
Rerun the peephole optimizer after removing the current instruction.
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%!s(int64=11) %!d(string=hai) anos |
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masta
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57ff589ec7
Always set p to the next instruction after removing p from asml.
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%!s(int64=11) %!d(string=hai) anos |
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masta
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c644503daf
Add MovLdr2Ldr peephole optimizer for ARM
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%!s(int64=11) %!d(string=hai) anos |
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masta
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77d12f61a2
Handle LDRD and STRD correctly in RegInInstruction for ARM
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%!s(int64=11) %!d(string=hai) anos |
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Jeppe Johansen
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d24cbbf9f5
Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4.
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%!s(int64=11) %!d(string=hai) anos |
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florian
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4d5119bf1c
* fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables
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%!s(int64=11) %!d(string=hai) anos |
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Jonas Maebe
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10ae87f11c
* fixed LdrLdr2LdrMov optimisation in case the first and second ldr have
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%!s(int64=12) %!d(string=hai) anos |
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Jonas Maebe
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31a3122b91
* fixed LsrAnd2Lsr test by replacing the existing buggy check with comparing
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%!s(int64=12) %!d(string=hai) anos |
 sergei
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a5ae26da7e
* Moved SkipEntryExitMarker method from ARM optimizer to the base one, since it is not target-dependent. Now it can be reused by other targets.
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%!s(int64=12) %!d(string=hai) anos |
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florian
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cb1f38b0af
* strd/ldrd are not supported by thumb
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%!s(int64=12) %!d(string=hai) anos |
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masta
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ff95d42216
Fix ShiftShift2Shift 1 ARM-peephole optimizer
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%!s(int64=12) %!d(string=hai) anos |
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florian
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d4968e054b
+ arm: tsettings.instructionset
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%!s(int64=12) %!d(string=hai) anos |
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florian
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7cef301e84
* disable optimization LdrbAnd2Ldrb for arm thumb as it is currently done
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%!s(int64=12) %!d(string=hai) anos |
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florian
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d5ddf39f73
* do not do the RedundantMovProcess optimization when the involved registers are r13 or r15 and if the target is arm thumb(2)
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%!s(int64=12) %!d(string=hai) anos |
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florian
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8884f1c0bf
* arm thumb2 supports only left shifted index registers up to 3 bits
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%!s(int64=12) %!d(string=hai) anos |
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Jonas Maebe
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8ffb704b8c
* don't split address labels from the instruction they belong with when
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%!s(int64=12) %!d(string=hai) anos |
