Commit History

Author SHA1 Message Date
  Jeppe Johansen d3e91bb60c Fixed issue #26965. The peephole optimization didn't move a potential register deallocation to after the ldr instruction causing mov's to be removed. 10 years ago
  sergei a3c439c60f - No longer insert BlockStart markers into asmlists. The presence of these markers disrupts peephole optimizations and require additional checks all over the place, causing various workarounds/hacks (like TAsmList.Create_without_marker) to start building up. 11 years ago
  masta 7e22bd53b6 Changed ARMs StrLdr2StrMov peephole optimizer look further ahead 11 years ago
  masta bfa85218fa Introduce TCpuAsmOptimizer.GetNextInstructionUsingRef 11 years ago
  masta d1c5f89976 Make Next an Out-parameter in ARMs GetNextInstructionUsingReg 11 years ago
  masta 7a0c79de60 Fix for AndLsl2Lsl in ARM Peephole optimizer 11 years ago
  masta 85d208fea4 Fix ARM LoadScheduler in case of Pre/PostIndexed addressing 11 years ago
  Jeppe Johansen 857a849173 Added an additional check to the MulAdd2MLA optimization. The operands of the multiplication weren't checked. 11 years ago
  Jeppe Johansen a1197460e1 Constrained a number of optimizations and updated reference offsets for ARM Thumb. 11 years ago
  florian 23c8517418 * applying opXYX2opsXY to ADD makes no sense on thumb-2 (at least as far as I can see) 11 years ago
  Jeppe Johansen 95589fb1e2 Apply DataMov2Data to MLA and MLS too. Those have over 4 operands. 11 years ago
  florian ac85d44899 * do OpCmp2OpS optimization also if after cmp follows an appropriate mov 11 years ago
  Jeppe Johansen 6861cbcf16 Allow FoldShiftLdrStr for all sizes of LDR/STR, and disable it for references that post/pre increment the base register on Thumb-2 targets. 11 years ago
  Jeppe Johansen 07b2982e77 Don't do ARM FoldShiftLdrStr peephole optimization if there's an offset in the reference. 11 years ago
  masta 3f8549365a Don't schedule LDRD on ARM 11 years ago
  Jeppe Johansen 257b1affaa Fixed previous fix of LsrAnd2Lsr optimization. 11 years ago
  Jeppe Johansen f773334374 Fixed LsrAnd2Lsr peephole optimization for ARM. 11 years ago
  Jeppe Johansen 3b4f59c316 Fixed MLA/MLS peephole optimization and moved it to the generic ARM peephole optimizer. 11 years ago
  Jeppe Johansen 184baa3f99 Fixed invalid peephole optimization of ADD/SUB(SP) instructions for ARMv7*M targets. 11 years ago
  masta 9e0af11ad8 Rerun the peephole optimizer after removing the current instruction. 11 years ago
  masta 57ff589ec7 Always set p to the next instruction after removing p from asml. 11 years ago
  masta c644503daf Add MovLdr2Ldr peephole optimizer for ARM 11 years ago
  masta 77d12f61a2 Handle LDRD and STRD correctly in RegInInstruction for ARM 11 years ago
  Jeppe Johansen d24cbbf9f5 Changed debug information to dwarf for ARM_embedded, and set local minimum alignment to 4. 11 years ago
  florian 4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 11 years ago
  Jonas Maebe 10ae87f11c * fixed LdrLdr2LdrMov optimisation in case the first and second ldr have 11 years ago
  Jonas Maebe 31a3122b91 * fixed LsrAnd2Lsr test by replacing the existing buggy check with comparing 11 years ago
  sergei a5ae26da7e * Moved SkipEntryExitMarker method from ARM optimizer to the base one, since it is not target-dependent. Now it can be reused by other targets. 11 years ago
  florian cb1f38b0af * strd/ldrd are not supported by thumb 12 years ago
  masta ff95d42216 Fix ShiftShift2Shift 1 ARM-peephole optimizer 12 years ago